31 #define TLE94112_NUM_HB 13
38 #define TLE94112_NUM_PWM 4
46 #define TLE94112_NUM_CTRL_REGS 12
54 #define TLE94112_NUM_STATUS_REGS 7
72 TLE_NOHB = 0,
TLE_HB1, TLE_HB2, TLE_HB3, TLE_HB4, TLE_HB5, TLE_HB6,
73 TLE_HB7, TLE_HB8, TLE_HB9,
TLE_HB10, TLE_HB11, TLE_HB12
79 TLE_NOPWM = 0, TLE_PWM1, TLE_PWM2, TLE_PWM3
85 TLE_FLOATING = 0b00, TLE_LOW = 0b01, TLE_HIGH = 0b10
91 TLE_NONE = 0b00, TLE_LOWSIDE = 0b01, TLE_HIGHSIDE = 0b10
103 TLE_SPI_ERROR = 0x80,
104 TLE_LOAD_ERROR = 0x40,
105 TLE_UNDER_VOLTAGE = 0x20,
106 TLE_OVER_VOLTAGE = 0x10,
107 TLE_POWER_ON_RESET = 0x08,
108 TLE_TEMP_SHUTDOWN = 0x04,
109 TLE_TEMP_WARNING = 0x02
113 static const uint8_t TLE_STATUS_OK = 0U;
177 uint8_t setLedMode(
HalfBridge hb, uint8_t active);
184 uint8_t getSysDiagnosis();
195 uint8_t getSysDiagnosis(
DiagFlag mask);
207 uint8_t getSysDiagnosis(uint8_t mask);
321 void _configHB(uint8_t hb, uint8_t state, uint8_t pwm, uint8_t activeFW);
330 void _configPWM(uint8_t pwm, uint8_t freq, uint8_t dutyCycle);
340 uint8_t _getHBOverCurrent(uint8_t hb);
350 uint8_t _getHBOpenLoad(uint8_t hb);
364 void writeReg(uint8_t reg, uint8_t mask, uint8_t shift, uint8_t data);
376 uint8_t readStatusReg(uint8_t reg);
390 uint8_t readStatusReg(uint8_t reg, uint8_t mask, uint8_t shift);
400 void clearStatusReg(uint8_t reg);
TLE94112 GPIO Platform Abstraction Layer.
uint8_t dcShift
Definition: tle94112.hpp:294
DiagFlag
enum for the flags in the register SYS_DIAG1
Definition: tle94112.hpp:102
uint8_t ocReg
Definition: tle94112.hpp:278
HBState
enum for the output states of a halfbridge
Definition: tle94112.hpp:84
uint8_t fwShift
Definition: tle94112.hpp:277
PWMFreq
enum for the frequencies of a PWM channel
Definition: tle94112.hpp:96
@ TLE_FREQ100HZ
Definition: tle94112.hpp:97
uint8_t fwReg
Definition: tle94112.hpp:275
uint8_t olMask
Definition: tle94112.hpp:282
uint8_t olShift
Definition: tle94112.hpp:283
HBOCState
enum for the overcurrent states of a halfbridge
Definition: tle94112.hpp:90
uint8_t freqShift
Definition: tle94112.hpp:291
uint8_t ocMask
Definition: tle94112.hpp:279
Timer * timer
Definition: tle94112.hpp:233
uint8_t dcReg
Definition: tle94112.hpp:292
GPIOC * cs
Definition: tle94112.hpp:231
SPIC * sBus
Definition: tle94112.hpp:230
GPIOC * en
Definition: tle94112.hpp:232
uint8_t pwmShift
Definition: tle94112.hpp:274
PWMChannel
enum for the PWM channels of a halfbridge on TLE94112
Definition: tle94112.hpp:78
StatusRegisters
enum for the status registers in a TLE94112
Definition: tle94112.hpp:256
@ OP_ERROR_4_STAT
Definition: tle94112.hpp:261
@ OP_ERROR_5_STAT
Definition: tle94112.hpp:262
@ OP_ERROR_2_STAT
Definition: tle94112.hpp:259
@ OP_ERROR_1_STAT
Definition: tle94112.hpp:258
@ OP_ERROR_3_STAT
Definition: tle94112.hpp:260
HalfBridge
enum for the halfbridges on a TLE94112
Definition: tle94112.hpp:71
@ TLE_HB1
Definition: tle94112.hpp:72
@ TLE_HB10
Definition: tle94112.hpp:73
uint8_t freqMask
Definition: tle94112.hpp:290
uint8_t freqReg
Definition: tle94112.hpp:289
uint8_t ocShift
Definition: tle94112.hpp:280
uint8_t dcMask
Definition: tle94112.hpp:293
uint8_t stateReg
Definition: tle94112.hpp:269
uint8_t stateMask
Definition: tle94112.hpp:270
uint8_t fwMask
Definition: tle94112.hpp:276
uint8_t pwmReg
Definition: tle94112.hpp:272
uint8_t pwmMask
Definition: tle94112.hpp:273
uint8_t mEnabled
Definition: tle94112.hpp:402
CtrlRegisters
enum for the control registers in a TLE94112
Definition: tle94112.hpp:239
@ FW_OL_CTRL
Definition: tle94112.hpp:250
@ HB_MODE_2_CTRL
Definition: tle94112.hpp:244
@ PWM_CH_FREQ_CTRL
Definition: tle94112.hpp:246
@ PWM3_DC_CTRL
Definition: tle94112.hpp:249
@ HB_ACT_2_CTRL
Definition: tle94112.hpp:241
@ PWM2_DC_CTRL
Definition: tle94112.hpp:248
@ HB_ACT_3_CTRL
Definition: tle94112.hpp:242
@ PWM1_DC_CTRL
Definition: tle94112.hpp:247
@ HB_MODE_1_CTRL
Definition: tle94112.hpp:243
@ HB_MODE_3_CTRL
Definition: tle94112.hpp:245
uint8_t stateShift
Definition: tle94112.hpp:271
uint8_t olReg
Definition: tle94112.hpp:281
struct containing register locations for a single halfbridge
Definition: tle94112.hpp:268
struct containing register locations for a single PWM channel
Definition: tle94112.hpp:288
represents a basic TLE94112
Definition: tle94112.hpp:67
#define TLE94112_NUM_HB
the number of halfbridges on a TLE94112 (including no halfbridge)
Definition: tle94112.hpp:31
#define TLE94112_NUM_PWM
the number of pwm modes for a halfbridge (including no pwm)
Definition: tle94112.hpp:38
#define TLE94112_NUM_STATUS_REGS
the number of status registers in a TLE94112
Definition: tle94112.hpp:54
#define TLE94112_NUM_CTRL_REGS
the number of control registers in a TLE94112
Definition: tle94112.hpp:46
Definition: tle94112-types.hpp:14
TLE94112 SPI Platform Abstraction Layer.
TLE94112 Timer Platform Abstraction Layer.