Multi Half-Bridge  4.0.0
Library of Infineon's Multi Half-Bridge IC controllers family
tle94112.hpp
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1 
10 #ifndef TLE94112_HPP_
11 #define TLE94112_HPP_
12 
13 #include <stdint.h>
14 #include <stdlib.h>
15 #include "timer.hpp"
16 #include "gpio.hpp"
17 #include "spic.hpp"
18 
19 using namespace tle94112;
20 
31 #define TLE94112_NUM_HB 13
32 
38 #define TLE94112_NUM_PWM 4
39 
46 #define TLE94112_NUM_CTRL_REGS 12
47 
54 #define TLE94112_NUM_STATUS_REGS 7
55 
66 class Tle94112
67 {
68  public:
71  {
72  TLE_NOHB = 0, TLE_HB1, TLE_HB2, TLE_HB3, TLE_HB4, TLE_HB5, TLE_HB6,
73  TLE_HB7, TLE_HB8, TLE_HB9, TLE_HB10, TLE_HB11, TLE_HB12
74  };
75 
78  {
79  TLE_NOPWM = 0, TLE_PWM1, TLE_PWM2, TLE_PWM3
80  };
81 
83  enum HBState
84  {
85  TLE_FLOATING = 0b00, TLE_LOW = 0b01, TLE_HIGH = 0b10
86  };
87 
89  enum HBOCState
90  {
91  TLE_NONE = 0b00, TLE_LOWSIDE = 0b01, TLE_HIGHSIDE = 0b10
92  };
93 
95  enum PWMFreq
96  {
97  TLE_FREQOFF = 0b00, TLE_FREQ80HZ, TLE_FREQ100HZ, TLE_FREQ200HZ
98  };
99 
101  enum DiagFlag
102  {
103  TLE_SPI_ERROR = 0x80,
104  TLE_LOAD_ERROR = 0x40,
105  TLE_UNDER_VOLTAGE = 0x20,
106  TLE_OVER_VOLTAGE = 0x10,
107  TLE_POWER_ON_RESET = 0x08,
108  TLE_TEMP_SHUTDOWN = 0x04,
109  TLE_TEMP_WARNING = 0x02
110  };
111 
113  static const uint8_t TLE_STATUS_OK = 0U;
114 
116  Tle94112();
117 
119  Tle94112(SPIC * sBus, GPIOC * cs, GPIOC * en, Timer * timer);
120 
122  ~Tle94112();
123 
125  void begin(void);
126 
128  void end(void);
129 
140  void configHB(HalfBridge hb, HBState state, PWMChannel pwm);
141 
154  void configHB(HalfBridge hb, HBState state, PWMChannel pwm, uint8_t activeFW);
155 
165  void configPWM(PWMChannel pwm, PWMFreq freq, uint8_t dutyCycle);
166 
177  uint8_t setLedMode(HalfBridge hb, uint8_t active);
178 
184  uint8_t getSysDiagnosis();
185 
195  uint8_t getSysDiagnosis(DiagFlag mask);
196 
207  uint8_t getSysDiagnosis(uint8_t mask);
208 
216  uint8_t getHBOverCurrent(HalfBridge hb);
217 
225  uint8_t getHBOpenLoad(HalfBridge hb);
226 
228  void clearErrors();
229 
230  SPIC *sBus; //<! \brief SPI cover class as representation of the SPI bus
231  GPIOC *cs; //<! \brief shield enable GPIO to switch chipselect on/off
232  GPIOC *en; //<! \brief shield enable GPIO to switch shield on/off
233  Timer *timer; //<! \brief timer for delay settings
234 
235  protected:
236 
239  {
240  HB_ACT_1_CTRL = 0,
251  FW_CTRL
252  };
253 
256  {
257  SYS_DIAG1 = 0,
263  OP_ERROR_6_STAT
264  };
265 
267  typedef struct
268  {
269  uint8_t stateReg;
270  uint8_t stateMask;
271  uint8_t stateShift;
272  uint8_t pwmReg;
273  uint8_t pwmMask;
274  uint8_t pwmShift;
275  uint8_t fwReg;
276  uint8_t fwMask;
277  uint8_t fwShift;
278  uint8_t ocReg;
279  uint8_t ocMask;
280  uint8_t ocShift;
281  uint8_t olReg;
282  uint8_t olMask;
283  uint8_t olShift;
284  } HalfBridge_t;
285 
287  typedef struct
288  {
289  uint8_t freqReg;
290  uint8_t freqMask;
291  uint8_t freqShift;
292  uint8_t dcReg;
293  uint8_t dcMask;
294  uint8_t dcShift;
295  } PWMchannel_t;
296 
297 
303  uint8_t mCtrlRegAddresses[TLE94112_NUM_CTRL_REGS];
305  uint8_t mCtrlRegData[TLE94112_NUM_CTRL_REGS];
307  uint8_t mStatusRegAddresses[TLE94112_NUM_STATUS_REGS];
308 
310  void init(void);
311 
321  void _configHB(uint8_t hb, uint8_t state, uint8_t pwm, uint8_t activeFW);
322 
330  void _configPWM(uint8_t pwm, uint8_t freq, uint8_t dutyCycle);
331 
340  uint8_t _getHBOverCurrent(uint8_t hb);
341 
350  uint8_t _getHBOpenLoad(uint8_t hb);
351 
364  void writeReg(uint8_t reg, uint8_t mask, uint8_t shift, uint8_t data);
365 
376  uint8_t readStatusReg(uint8_t reg);
377 
390  uint8_t readStatusReg(uint8_t reg, uint8_t mask, uint8_t shift);
391 
400  void clearStatusReg(uint8_t reg);
401 
402  uint8_t mEnabled; //<! \brief indicates if TLE94112LE is enabled
403 
404 };
405 
408 #endif
TLE94112 GPIO Platform Abstraction Layer.
Definition: gpio.hpp:24
Definition: spic.hpp:25
Definition: timer.hpp:24
uint8_t dcShift
Definition: tle94112.hpp:294
DiagFlag
enum for the flags in the register SYS_DIAG1
Definition: tle94112.hpp:102
uint8_t ocReg
Definition: tle94112.hpp:278
HBState
enum for the output states of a halfbridge
Definition: tle94112.hpp:84
uint8_t fwShift
Definition: tle94112.hpp:277
PWMFreq
enum for the frequencies of a PWM channel
Definition: tle94112.hpp:96
@ TLE_FREQ100HZ
Definition: tle94112.hpp:97
uint8_t fwReg
Definition: tle94112.hpp:275
uint8_t olMask
Definition: tle94112.hpp:282
uint8_t olShift
Definition: tle94112.hpp:283
HBOCState
enum for the overcurrent states of a halfbridge
Definition: tle94112.hpp:90
uint8_t freqShift
Definition: tle94112.hpp:291
uint8_t ocMask
Definition: tle94112.hpp:279
Timer * timer
Definition: tle94112.hpp:233
uint8_t dcReg
Definition: tle94112.hpp:292
GPIOC * cs
Definition: tle94112.hpp:231
SPIC * sBus
Definition: tle94112.hpp:230
GPIOC * en
Definition: tle94112.hpp:232
uint8_t pwmShift
Definition: tle94112.hpp:274
PWMChannel
enum for the PWM channels of a halfbridge on TLE94112
Definition: tle94112.hpp:78
StatusRegisters
enum for the status registers in a TLE94112
Definition: tle94112.hpp:256
@ OP_ERROR_4_STAT
Definition: tle94112.hpp:261
@ OP_ERROR_5_STAT
Definition: tle94112.hpp:262
@ OP_ERROR_2_STAT
Definition: tle94112.hpp:259
@ OP_ERROR_1_STAT
Definition: tle94112.hpp:258
@ OP_ERROR_3_STAT
Definition: tle94112.hpp:260
HalfBridge
enum for the halfbridges on a TLE94112
Definition: tle94112.hpp:71
@ TLE_HB1
Definition: tle94112.hpp:72
@ TLE_HB10
Definition: tle94112.hpp:73
uint8_t freqMask
Definition: tle94112.hpp:290
uint8_t freqReg
Definition: tle94112.hpp:289
uint8_t ocShift
Definition: tle94112.hpp:280
uint8_t dcMask
Definition: tle94112.hpp:293
uint8_t stateReg
Definition: tle94112.hpp:269
uint8_t stateMask
Definition: tle94112.hpp:270
uint8_t fwMask
Definition: tle94112.hpp:276
uint8_t pwmReg
Definition: tle94112.hpp:272
uint8_t pwmMask
Definition: tle94112.hpp:273
uint8_t mEnabled
Definition: tle94112.hpp:402
CtrlRegisters
enum for the control registers in a TLE94112
Definition: tle94112.hpp:239
@ FW_OL_CTRL
Definition: tle94112.hpp:250
@ HB_MODE_2_CTRL
Definition: tle94112.hpp:244
@ PWM_CH_FREQ_CTRL
Definition: tle94112.hpp:246
@ PWM3_DC_CTRL
Definition: tle94112.hpp:249
@ HB_ACT_2_CTRL
Definition: tle94112.hpp:241
@ PWM2_DC_CTRL
Definition: tle94112.hpp:248
@ HB_ACT_3_CTRL
Definition: tle94112.hpp:242
@ PWM1_DC_CTRL
Definition: tle94112.hpp:247
@ HB_MODE_1_CTRL
Definition: tle94112.hpp:243
@ HB_MODE_3_CTRL
Definition: tle94112.hpp:245
uint8_t stateShift
Definition: tle94112.hpp:271
uint8_t olReg
Definition: tle94112.hpp:281
struct containing register locations for a single halfbridge
Definition: tle94112.hpp:268
struct containing register locations for a single PWM channel
Definition: tle94112.hpp:288
represents a basic TLE94112
Definition: tle94112.hpp:67
#define TLE94112_NUM_HB
the number of halfbridges on a TLE94112 (including no halfbridge)
Definition: tle94112.hpp:31
#define TLE94112_NUM_PWM
the number of pwm modes for a halfbridge (including no pwm)
Definition: tle94112.hpp:38
#define TLE94112_NUM_STATUS_REGS
the number of status registers in a TLE94112
Definition: tle94112.hpp:54
#define TLE94112_NUM_CTRL_REGS
the number of control registers in a TLE94112
Definition: tle94112.hpp:46
Definition: tle94112-types.hpp:14
TLE94112 SPI Platform Abstraction Layer.
TLE94112 Timer Platform Abstraction Layer.