Data Structures | |
| struct | stl_mpu_entry_t |
| Entry parameters for SelfTest_MPU(), supplied by the application. More... | |
| struct stl_mpu_entry_t |
| Data Fields | ||
|---|---|---|
| volatile uint32_t * | testAddress |
First word of a dedicated MPU_TEST_BLOCK_BYTES block, aligned to MPU_TEST_BLOCK_BYTES, that holds no other data and no stack, for example CY_ALIGN(32) static volatile uint32_t scratch[8];. The whole block is read-only while the test runs; any other write to it (for example from an ISR) raises a MemManage fault that the STL does not consume. Any normal memory (cacheable or non-cacheable) is supported: the ARM core MPU is checked before the D-cache. |
| uint32_t | expectedValue |
Value stl_mpu_entry_t::testAddress must hold before the test runs, for example 0x5A5A5A5A. The application must prime the scratch word with this value before every call to SelfTest_MPU(). If the denied write does not fault, stl_mpu_entry_t::writeValue remains in the scratch word. |
| uint32_t | writeValue |
Value the self-test attempts to write. Must differ from stl_mpu_entry_t::expectedValue. |
| uint8_t | regionNumber |
Spare MPU region index to borrow for the duration of the test, from MPU_TEST_MIN_REGION_NUM to the highest region implemented by the core (MPU->TYPE.DREGION - 1, checked at run time; 15 on XMC7000 CM7). Region 0 is excluded because BSPs for cache-enabled cores (for example XMC7000 CM7) typically reserve it for a non-cacheable memory window. The region must be disabled when SelfTest_MPU() is called, its When enabled regions overlap, ARMv7-M applies the attributes of the highest-numbered one. A higher-numbered enabled region that allows privileged writes over the scratch block therefore overrides the test region: the write succeeds and SelfTest_MPU() returns ERROR_STATUS, which cannot be differentiated from an MPU defect. Use the highest free region number, or make sure no higher-numbered region overlaps the scratch block. |