Macros

General Description

Macros
#define	NUMBER_OF_TIMER_TICKS_LO   (9u)
	Lower possible interrupt count.
#define	NUMBER_OF_TIMER_TICKS_HI   (15u)
	Higher possible interrupt count.
#define	INTERRUPT_TEST_TIME   (1000u)
	Interrupt test period.

Macro Definition Documentation

NUMBER_OF_TIMER_TICKS_LO

#define NUMBER_OF_TIMER_TICKS_LO   (9u)

Lower possible interrupt count.

• PSOC 4 devices: 9u
• PSOC 61 Programmable Line, PSOC 62 Performance Line, PSOC Control C3, XMC7000, and XMC5000 devices: 22u for configurations where the timer input clock and period produce about 22 to 27 terminal- count interrupts in 1000 us; 22u is the low end of that fixed pass window

NUMBER_OF_TIMER_TICKS_HI

#define NUMBER_OF_TIMER_TICKS_HI   (15u)

Higher possible interrupt count.

• PSOC 4 devices: 15u
• PSOC 61 Programmable Line, PSOC 62 Performance Line, PSOC Control C3, XMC7000, and XMC5000 devices: 27u for configurations where the timer input clock and period produce about 22 to 27 terminal- count interrupts in 1000 us; 27u is the high end of that fixed pass window