Functions

General Description

Functions
uint8_t	SelfTest_DMAC (DMAC_Type *base, uint32_t channel, cy_stc_dmac_descriptor_t *descriptor0, cy_stc_dmac_descriptor_t *descriptor1, const cy_stc_dmac_descriptor_config_t *des0_config, const cy_stc_dmac_descriptor_config_t *des1_config, cy_stc_dmac_channel_config_t const *channelConfig, en_trig_output_mdma_t trigLine)
	This function performs the DMAC channel test routine by transfering data between data arrays using DMAC and verifying if the destination block contains the expected data pattern.
uint8_t	SelfTest_DMAC (DMAC_Type *base, uint32_t channel, uint32_t trigLine)
	This function performs the DMAC channel test routine by transfering data between data arrays using DMAC and verifying if the destination block contains the expected data pattern.

Function Documentation

SelfTest_DMAC() [1/2]

uint8_t SelfTest_DMAC	(	DMAC_Type *	base,
		uint32_t	channel,
		cy_stc_dmac_descriptor_t *	descriptor0,
		cy_stc_dmac_descriptor_t *	descriptor1,
		const cy_stc_dmac_descriptor_config_t *	des0_config,
		const cy_stc_dmac_descriptor_config_t *	des1_config,
		cy_stc_dmac_channel_config_t const *	channelConfig,
		en_trig_output_mdma_t	trigLine )

This function performs the DMAC channel test routine by transfering data between data arrays using DMAC and verifying if the destination block contains the expected data pattern.

The DMAC block test procedure:
1) A 66-bytes destination block is set to 0 with DMA transfers using 16 x 32-bit transfers from a fixed address.
2) The destination block is verified to be all 0.
3) Another destination block is filled with 00 00 ff by using an 8-bit DMA transfers from a fixed address with an increment of 1 and a length of 64.
4) The destination block is verified to contain the correct pattern (shown below with lowest address first): ff0000ff0000ff0000ff0000ff0000ff0000ff0000ff0000…

Parameters

base	The pointer to the hardware DMA block
channel	The channel number.
descriptor0	This is the descriptor to associate with the channel (transfer 0's to destination).
descriptor1	This is the descriptor to associate with the channel (transfer pattern to destination).
des0_config	This is a configuration structure with all initialization information for the descriptor.
des1_config	This is a configuration structure with all initialization information for the descriptor.
channelConfig	The structure with the initialization information for the channel.
trigLine	The input of the trigger mux. -> Bit 30 represents if the signal is an input/output. When this bit is set, the trigger activation is for an output trigger from the trigger multiplexer. When this bit is reset, the trigger activation is for an input trigger to the trigger multiplexer. -> Bits 12:8 represent the trigger group selection. -> For the output trigger line (bit 30 is set): For PERI_ver1: -> Bits 6:0 select the output trigger number in the trigger group. For PERI_ver2: -> Bits 7:0 select the output trigger number in the trigger group. For the input trigger line (bit 30 is unset): -> Bits 7:0 select the input trigger signal for the trigger multiplexer.

Note

Applicable only for PSOC 61 Programmable Line, PSOC 62 Performance Line, XMC7000 and XMC5000 devices. Use a DMAC channel, descriptors, and trigger line dedicated to this self-test. The function initializes the descriptors and channel, sets the descriptor source/destination addresses, and enables the selected DMAC channel.

Returns

OK_STATUS (0) - Test passed
ERROR_STATUS (1) - Test failed

SelfTest_DMAC() [2/2]

uint8_t SelfTest_DMAC	(	DMAC_Type *	base,
		uint32_t	channel,
		uint32_t	trigLine )

This function performs the DMAC channel test routine by transfering data between data arrays using DMAC and verifying if the destination block contains the expected data pattern.

The DMAC block test procedure:
1) A 64-byte destination block is set to 0 with DMA transfers using 16 x 32-bit transfers from a fixed address.
2) The destination block is verified to be all 0.
3) The same destination block is filled with 00 00 ff by using an 8-bit DMA transfers from a fixed address with an increment of 1 and a length of 64.
4) The destination block is verified to contain the correct pattern (shown below with lowest address first): ff0000ff0000ff0000ff0000ff0000ff0000ff0000ff0000…

Parameters

base	The pointer to the hardware DMAC block
channel	The DMAC channel number
trigLine	The input trigger to start data transfer for the selected DMAC channel. Refer to device TRM for details on trigLine value selection

Note

Applicable only for PSOC 4 devices. Use a DMAC channel and trigger line dedicated to this self-test. The function initializes the selected channel descriptors, sets source/destination addresses, enables the DMAC channel, and clears the channel interrupt state.

Returns

OK_STATUS (0) - Test passed
ERROR_STATUS (1) - Test failed