The CONTROL register test detects stuck-at faults in the CONTROL register bits that are implemented and writable on the core.
It also checks that the stack pointer selection bit (SPSEL) really switches the active stack pointer.
The test performs the following major tasks:
1) Checks that it is called from privileged Thread mode and masks interrupts.
2) Saves CONTROL, the active stack pointer, and the process stack pointer (PSP).
3) Writes SPSEL = 0, reads CONTROL back, and checks that the main stack
pointer (MSP) is the active stack pointer.
4) Points PSP to a dedicated test stack inside the library, writes SPSEL = 1,
reads CONTROL back, checks that the active stack pointer is the test
stack, and pushes a probe word to it.
5) Restores CONTROL and PSP, and checks the restored values before it
returns. The caller's interrupt mask (PRIMASK) is restored too.
The nPRIV bit is not tested, because unprivileged Thread mode can't set it back to privileged. The test never writes it and leaves it at its original value.
On cores that execute FPU instructions (the image is compiled with __ARM_FP), the test also checks the FPCA bit. In a Secure image (__ARM_FEATURE_CMSE == 3) it checks the SFPA bit too. Set SELFTEST_CONTROL_SKIP_FP_BITS to 1 to exclude both bits, when the device safety argument doesn't require them. The test then never writes FPCA and SFPA.
On Armv8-M Mainline cores (for example, Cortex-M33 and Cortex-M55), the test also saves PSPLIM, sets it to the bottom of the test stack while PSP points there, and restores and checks it afterward.
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