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#define | MTB_PMBUS_ACL_BIT_WRITE_ACCESS (0x80U) |
| | Access Control Byte bit [7]: block write access to the target command.
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#define | MTB_PMBUS_ACL_BIT_READ_ACCESS (0x40U) |
| | Access Control Byte bit [6]: block read access to the target command.
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#define | MTB_PMBUS_ACL_BIT_AUTH_WRITE (0x20U) |
| | Access Control Byte bit [5]: disable authenticated write (security action request)
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#define | MTB_PMBUS_ACL_BIT_NVM_STORE (0x10U) |
| | Access Control Byte bit [4]: block NVM STORE for the target command.
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#define | MTB_PMBUS_ACL_BIT_NVM_RESTORE (0x08U) |
| | Access Control Byte bit [3]: block NVM RESTORE for the target command.
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#define | MTB_PMBUS_ACL_BIT_WRITE_ONCE (0x04U) |
| | Access Control Byte bit [2]: allow one write only, then block subsequent writes.
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#define | MTB_PMBUS_ACL_BIT_NO_MORE (0x02U) |
| | Access Control Byte bit [1]: ACL byte not alterable even when PASSKEY is unlocked.
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#define | MTB_PMBUS_ACL_BIT_NEVER_AGAIN (0x01U) |
| | Access Control Byte bit [0]: ACL byte permanently locked (set at POR)
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