I2C High-speed mode Callback Events

Macros to check I2C HS event by cy_cb_scb_i2c_handle_hs_mode_t callback. More...

Macros
#define	CY_SCB_I2C_SLAVE_HS_ENTER_EVENT   (0x01UL)
	Indicates that the slave detected 8-bit master code on line and waiting for changes peri clock divider value. More...
#define	CY_SCB_I2C_SLAVE_HS_EXIT_EVENT   (0x02UL)
	Indicates that the slave detected STOP condition for High-speed mode and waiting for changes peri clock divider value. More...

Detailed Description

Macros to check I2C HS event by cy_cb_scb_i2c_handle_hs_mode_t callback.

Each event is encoded in a separate bit and therefore it is possible to notify about multiple events.

Macro Definition Documentation

CY_SCB_I2C_SLAVE_HS_ENTER_EVENT

#define CY_SCB_I2C_SLAVE_HS_ENTER_EVENT   (0x01UL)

Indicates that the slave detected 8-bit master code on line and waiting for changes peri clock divider value.

Note

Only applicable for PSoC 4100S Max.

CY_SCB_I2C_SLAVE_HS_EXIT_EVENT

#define CY_SCB_I2C_SLAVE_HS_EXIT_EVENT   (0x02UL)

Indicates that the slave detected STOP condition for High-speed mode and waiting for changes peri clock divider value.

Note

Only applicable for PSoC 4100S Max.