CTB (Continuous Time Block)

This driver provides API functions to configure and use the analog CTB. More...

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Detailed Description

This driver provides API functions to configure and use the analog CTB.

The functions and other declarations used in this driver are in cy_ctb.h. You can include cy_pdl.h to get access to all functions and declarations in the PDL.

The CTB comprises two identical operational amplifiers (opamps) and a switch routing matrix. The high-level features are:

• Two highly-configurable opamps:
  • Feature programmable power and output drive strength
  • Can be configured as a voltage follower using internal routing
  • Can be configured as a comparator with an optional 10 mV hysteresis
• Flexible input and output routing
• Can be used as a buffer or amplifier for SAR ADC inputs
• Can operate in Deep Sleep power mode.

Each opamp, marked OA0 and OA1, has one input and three output stages, all of which share the common input stage. The only one output stage can be selected at a time.

The output stage can operate as a low-drive strength opamp for internal connections (1X), a high-drive strength opamp for driving a device pin (10X), or a comparator.

Using the switching matrix, the opamp inputs and outputs can be connected to dedicated general-purpose I/Os or other internal analog blocks. See the device datasheet for the dedicated CTB port.

CTB Switch Diagram

Initialization and Enable

Before enabling the CTB, set up any external components (such as resistors) needed for the design.

To configure the entire hardware CTB block, call Cy_CTB_Init. Alternatively, to configure only one opamp, call Cy_CTB_OpampInit. The base address of the CTB hardware can be found in the device specific header file.

After initialization, call Cy_CTB_Enable to enable the hardware.

Input/Output Connections

The CTB has internal switches to support flexible input and output routing. If these switches have not been configured during initialization, call Cy_CTB_SetAnalogSwitch to make the input and output connections. See the architecture TRM for more details.

    /* Scenario: OA0 has been configured as an opamp with 10x output drive using the
     * pre-defined Cy_CTB_Fast_Opamp0_Opamp10x configuration. The 10x output has
     * a dedicated connection to Pin 1.2.
     *
     * Call SetAnalogSwitch to route the non-inverting input of OA0 to Pin 1.6
     * and the inverting input to Pin 1.1.
     *
     * Note that the CTB port may vary based on device.
     *
     * Select OA0 switch register.
     * Select two switches for Pin 0 and Pin 1 of the CTB port.
     * Set the state of the switches to closed
     */
    Cy_CTB_SetAnalogSwitch(CTBM0, CY_CTB_OPAMP_0, CY_CTB_SW_OA0_POS_PIN0 | CY_CTB_SW_OA0_NEG_PIN1, true);

As shown in the CTB switch diagram, the external (10x) output of OA0 and OA1 have dedicated connections. If different output connections are required, the AMUXBUX A/B switches can be used.

Comparator Mode

Each opamp can be configured as a comparator. Note that when used as a comparator, the hardware shuts down the 1X and 10X output drivers. Specific to Comparator mode, there is an optional 10 mV input hysteresis and configurable edge detection interrupt handling.

• Negative input terminal: Usually connected to the reference voltage.
• Positive input terminal: Usually connected to the voltage being compared.
• Comparator digital output: Rises high when the positive input voltage is greater than the negative input voltage and vice versa.

The comparator output can be routed to a pin or other component using HSIOM or trigger muxes.

    /* Scenario: OA0 and OA1 of the CTB have been configured as comparators.
     * Route the digital outputs of comparator 0 and 1 to
     * P1.2 and P1.4, respectively, using HSIOM. */
    Cy_GPIO_Pin_FastInit(GPIO_PRT1, 2UL, CY_GPIO_DM_STRONG_IN_OFF, 0UL, P3_5_GPIO);

    Cy_GPIO_Pin_FastInit(GPIO_PRT1, 4UL, CY_GPIO_DM_STRONG_IN_OFF, 0UL, P3_4_GPIO);

Handling interrupts

The comparator output is connected to an edge detector block used to detect the edge (rising, falling, both, or disabled) for interrupt generation.

The following code snippet demonstrates how to implement a routine to handle the interrupt. The routine gets called when any comparator on the device generates an interrupt.

/* ISR function to handle the global CTB interrupt. */
void CTB_Comparator_Interrupt(void)
{
    uint32_t intrStatus;

    /* Get the interrupt status for both comparators of a specific CTB instance on the device. */
    intrStatus = Cy_CTB_GetInterruptStatus(CTBM0, CY_CTB_OPAMP_BOTH);

    /* Clear both comparator interrupts so that subsequent interrupts can be handled. */
    Cy_CTB_ClearInterrupt(CTBM0, CY_CTB_OPAMP_BOTH);

    if (CY_CTB_OPAMP_0 == (intrStatus & CY_CTB_OPAMP_0))
    {
        /* Do something when comparator 0 interrupt occurs. */
    }

    if (CY_CTB_OPAMP_1 == (intrStatus & CY_CTB_OPAMP_1))
    {
        /* Do something when comparator 1 interrupt occurs. */
    }
}

The following code snippet demonstrates how to configure and enable the interrupt.

    /* Scenario: Configure and enable the CTB comparator interrupt. */

    const cy_stc_sysint_t CTB_IRQ_cfg = {
            /* .intrSrc         = */ pass_0_interrupt_ctbs_IRQn,  /* Interrupt source is the global CTB interrupt */
            /* .intrPriority    = */ 3UL                        /* Interrupt priority is 3 */
    };

    /* Initialize the interrupt with vector at Comparator_Interrupt(). */
    (void)Cy_SysInt_Init(&CTB_IRQ_cfg, CTB_Comparator_Interrupt);

    /* Enable the interrupt. */
    NVIC_EnableIRQ(CTB_IRQ_cfg.intrSrc);

Opamp Input Range

The input range of the opamp can be rail-to-rail if the charge pump is enabled. See the device datasheet for more details.

Configuration Dependencies

The CTB relies on other blocks to function properly. The dependencies are documented here.

Charge Pump Configuration

Each opamp of the CTB has a charge pump that when enabled increases the input range to the supply rails. Call the Cy_CTB_SetPumpClkSource function to set the clock source for all CTBs. This clock can come from one of three sources:

1. The dedicated clock from the SRSS

   Call the following functions to configure the pump clock from the SRSS:

   • Cy_SysClk_ClkPumpSetSource

       /* Scenario: Use a 24 MHz clock from the SRSS for the charge pump clock. */
   
       /* Set the source to IMO, which has been configured for 24 MHz. */
       Cy_SysClk_ClkPumpSetSource(CY_SYSCLK_PUMP_IN_IMO);
   
       /* Select the source for the pump clock to be from the SRSS. */
       Cy_CTB_SetPumpClkSource(CTBM0, CY_CTB_CLK_PUMP_SRSS);

2. The high frequency clock

       /* Scenario: Use a 24 MHz clock from the High frequency clock for the charge pump clock. */
   
       /* Select the source for the pump clock to be the High frequency clock. */
       Cy_CTB_SetPumpClkSource(CTBM0, CY_CTB_CLK_PUMP_HF);

3. The high frequency clock divided by 2

Note

The same pump clock is used by all opamps on the device. Be aware of this when configuring different opamps to different power levels.

Reference Current Configurations

The CTB uses reference current generator from the Deep-Sleep Amplifier Bias (DSAB) block.

If the CTB is configured to operate in Deep Sleep mode, the appropriate reference current generator from the DSAB block must be enabled in Deep Sleep.

More Information

Refer to technical reference manual (TRM) and the device datasheet.

Changelog

Version	Changes	Reason for Change
1.0.1	Update the paths to the code snippets.	PDL structure update.
1.0	Initial version