Enumerated Types

General Description

Enumerations
enum	cy_en_smartio_status_t {   CY_SMARTIO_SUCCESS = 0x00u,   CY_SMARTIO_BAD_PARAM = CY_SMARTIO_ID | CY_PDL_STATUS_ERROR | 0x01u,   CY_SMARTIO_LOCKED = CY_SMARTIO_ID | CY_PDL_STATUS_ERROR | 0x02u }
	Smart I/O driver error codes. More...
enum	cy_en_smartio_clksrc_t {   CY_SMARTIO_CLK_IO0 = 0,   CY_SMARTIO_CLK_IO1 = 1,   CY_SMARTIO_CLK_IO2 = 2,   CY_SMARTIO_CLK_IO3 = 3,   CY_SMARTIO_CLK_IO4 = 4,   CY_SMARTIO_CLK_IO5 = 5,   CY_SMARTIO_CLK_IO6 = 6,   CY_SMARTIO_CLK_IO7 = 7,   CY_SMARTIO_CLK_CHIP0 = 8,   CY_SMARTIO_CLK_CHIP1 = 9,   CY_SMARTIO_CLK_CHIP2 = 10,   CY_SMARTIO_CLK_CHIP3 = 11,   CY_SMARTIO_CLK_CHIP4 = 12,   CY_SMARTIO_CLK_CHIP5 = 13,   CY_SMARTIO_CLK_CHIP6 = 14,   CY_SMARTIO_CLK_CHIP7 = 15,   CY_SMARTIO_CLK_DIVACT = 16,   CY_SMARTIO_CLK_DIVDS = 17,   CY_SMARTIO_CLK_DIVHIB = 18,   CY_SMARTIO_CLK_LFCLK = 19,   CY_SMARTIO_CLK_GATED = 20,   CY_SMARTIO_CLK_ASYNC = 31 }
	Smart I/O clock selection. More...
enum	cy_en_smartio_lutnum_t {   CY_SMARTIO_LUT0 = 0,   CY_SMARTIO_LUT1 = 1,   CY_SMARTIO_LUT2 = 2,   CY_SMARTIO_LUT3 = 3,   CY_SMARTIO_LUT4 = 4,   CY_SMARTIO_LUT5 = 5,   CY_SMARTIO_LUT6 = 6,   CY_SMARTIO_LUT7 = 7 }
	Smart I/O LUT number. More...
enum	cy_en_smartio_trnum_t {   CY_SMARTIO_TR0 = 0,   CY_SMARTIO_TR1 = 1,   CY_SMARTIO_TR2 = 2 }
	Smart I/O input trigger number. More...
enum	cy_en_smartio_datanum_t {   CY_SMARTIO_DATA0 = 0,   CY_SMARTIO_DATA1 = 1 }
	Smart I/O Data Unit's input "DATA" number. More...
enum	cy_en_smartio_luttr_t {   CY_SMARTIO_LUTTR_DU_OUT = 0,   CY_SMARTIO_LUTTR_LUT0_OUT = 0,   CY_SMARTIO_LUTTR_LUT1_OUT = 1,   CY_SMARTIO_LUTTR_LUT2_OUT = 2,   CY_SMARTIO_LUTTR_LUT3_OUT = 3,   CY_SMARTIO_LUTTR_LUT4_OUT = 4,   CY_SMARTIO_LUTTR_LUT5_OUT = 5,   CY_SMARTIO_LUTTR_LUT6_OUT = 6,   CY_SMARTIO_LUTTR_LUT7_OUT = 7,   CY_SMARTIO_LUTTR_CHIP0 = 8,   CY_SMARTIO_LUTTR_CHIP4 = 8,   CY_SMARTIO_LUTTR_CHIP1 = 9,   CY_SMARTIO_LUTTR_CHIP5 = 9,   CY_SMARTIO_LUTTR_CHIP2 = 10,   CY_SMARTIO_LUTTR_CHIP6 = 10,   CY_SMARTIO_LUTTR_CHIP3 = 11,   CY_SMARTIO_LUTTR_CHIP7 = 11,   CY_SMARTIO_LUTTR_IO0 = 12,   CY_SMARTIO_LUTTR_IO4 = 12,   CY_SMARTIO_LUTTR_IO1 = 13,   CY_SMARTIO_LUTTR_IO5 = 13,   CY_SMARTIO_LUTTR_IO2 = 14,   CY_SMARTIO_LUTTR_IO6 = 14,   CY_SMARTIO_LUTTR_IO3 = 15,   CY_SMARTIO_LUTTR_IO7 = 15,   CY_SMARTIO_LUTTR_INVALID = 255 }
	Smart I/O LUT input trigger source. More...
enum	cy_en_smartio_lutopc_t {   CY_SMARTIO_LUTOPC_COMB = 0,   CY_SMARTIO_LUTOPC_GATED_TR2 = 1,   CY_SMARTIO_LUTOPC_GATED_OUT = 2,   CY_SMARTIO_LUTOPC_ASYNC_SR = 3 }
	Smart I/O LUT opcode. More...
enum	cy_en_smartio_dutr_t {   CY_SMARTIO_DUTR_ZERO = 0,   CY_SMARTIO_DUTR_ONE = 1,   CY_SMARTIO_DUTR_DU_OUT = 2,   CY_SMARTIO_DUTR_LUT0_OUT = 3,   CY_SMARTIO_DUTR_LUT1_OUT = 4,   CY_SMARTIO_DUTR_LUT2_OUT = 5,   CY_SMARTIO_DUTR_LUT3_OUT = 6,   CY_SMARTIO_DUTR_LUT4_OUT = 7,   CY_SMARTIO_DUTR_LUT5_OUT = 8,   CY_SMARTIO_DUTR_LUT6_OUT = 9,   CY_SMARTIO_DUTR_LUT7_OUT = 10,   CY_SMARTIO_DUTR_INVALID = 255 }
	Smart I/O Data Unit input trigger source. More...
enum	cy_en_smartio_dudata_t {   CY_SMARTIO_DUDATA_ZERO = 0,   CY_SMARTIO_DUDATA_CHIP = 1,   CY_SMARTIO_DUDATA_IO = 2,   CY_SMARTIO_DUDATA_DATAREG = 3 }
	Smart I/O Data Unit input "DATA" source. More...
enum	cy_en_smartio_duopc_t {   CY_SMARTIO_DUOPC_INCR = 1,   CY_SMARTIO_DUOPC_DECR = 2,   CY_SMARTIO_DUOPC_INCR_WRAP = 3,   CY_SMARTIO_DUOPC_DECR_WRAP = 4,   CY_SMARTIO_DUOPC_INCR_DECR = 5,   CY_SMARTIO_DUOPC_INCR_DECR_WRAP = 6,   CY_SMARTIO_DUOPC_ROR = 7,   CY_SMARTIO_DUOPC_SHR = 8,   CY_SMARTIO_DUOPC_AND_OR = 9,   CY_SMARTIO_DUOPC_SHR_MAJ3 = 10,   CY_SMARTIO_DUOPC_SHR_EQL = 11 }
	Smart I/O Data Unit opcode. More...
enum	cy_en_smartio_dusize_t {   CY_SMARTIO_DUSIZE_1 = 0,   CY_SMARTIO_DUSIZE_2 = 1,   CY_SMARTIO_DUSIZE_3 = 2,   CY_SMARTIO_DUSIZE_4 = 3,   CY_SMARTIO_DUSIZE_5 = 4,   CY_SMARTIO_DUSIZE_6 = 5,   CY_SMARTIO_DUSIZE_7 = 6,   CY_SMARTIO_DUSIZE_8 = 7 }
	Smart I/O Data Unit operation bit size. More...

Enumeration Type Documentation

cy_en_smartio_status_t

enum cy_en_smartio_status_t

Smart I/O driver error codes.

Enumerator
CY_SMARTIO_SUCCESS	Returned successful.
CY_SMARTIO_BAD_PARAM	Bad parameter was passed.
CY_SMARTIO_LOCKED	Smart I/O is not disabled.

cy_en_smartio_clksrc_t

enum cy_en_smartio_clksrc_t

Smart I/O clock selection.

Enumerator
CY_SMARTIO_CLK_IO0	Clock sourced from signal on io0.
CY_SMARTIO_CLK_IO1	Clock sourced from signal on io1.
CY_SMARTIO_CLK_IO2	Clock sourced from signal on io2.
CY_SMARTIO_CLK_IO3	Clock sourced from signal on io3.
CY_SMARTIO_CLK_IO4	Clock sourced from signal on io4.
CY_SMARTIO_CLK_IO5	Clock sourced from signal on io5.
CY_SMARTIO_CLK_IO6	Clock sourced from signal on io6.
CY_SMARTIO_CLK_IO7	Clock sourced from signal on io7.
CY_SMARTIO_CLK_CHIP0	Clock sourced from signal on chip0.
CY_SMARTIO_CLK_CHIP1	Clock sourced from signal on chip1.
CY_SMARTIO_CLK_CHIP2	Clock sourced from signal on chip2.
CY_SMARTIO_CLK_CHIP3	Clock sourced from signal on chip3.
CY_SMARTIO_CLK_CHIP4	Clock sourced from signal on chip4.
CY_SMARTIO_CLK_CHIP5	Clock sourced from signal on chip5.
CY_SMARTIO_CLK_CHIP6	Clock sourced from signal on chip6.
CY_SMARTIO_CLK_CHIP7	Clock sourced from signal on chip7.
CY_SMARTIO_CLK_DIVACT	Clock sourced from a peripheral clock divider (Active)
CY_SMARTIO_CLK_DIVDS	Clock sourced from a peripheral clock divider (Deep-Sleep)
CY_SMARTIO_CLK_DIVHIB	Clock sourced from a peripheral clock divider (Hibernate)
CY_SMARTIO_CLK_LFCLK	Clock sourced from LFCLK.
CY_SMARTIO_CLK_GATED	Disables the clock. Used when turning off the block
CY_SMARTIO_CLK_ASYNC	Asynchronous operation (only allow combinatorial logic)

cy_en_smartio_lutnum_t

enum cy_en_smartio_lutnum_t

Smart I/O LUT number.

Enumerator
CY_SMARTIO_LUT0	Look-Up-Table #0.
CY_SMARTIO_LUT1	Look-Up-Table #1.
CY_SMARTIO_LUT2	Look-Up-Table #2.
CY_SMARTIO_LUT3	Look-Up-Table #3.
CY_SMARTIO_LUT4	Look-Up-Table #4.
CY_SMARTIO_LUT5	Look-Up-Table #5.
CY_SMARTIO_LUT6	Look-Up-Table #6.
CY_SMARTIO_LUT7	Look-Up-Table #7.

cy_en_smartio_trnum_t

enum cy_en_smartio_trnum_t

Smart I/O input trigger number.

Enumerator
CY_SMARTIO_TR0	Input trigger #0.
CY_SMARTIO_TR1	Input trigger #1.
CY_SMARTIO_TR2	Input trigger #2.

cy_en_smartio_datanum_t

enum cy_en_smartio_datanum_t

Smart I/O Data Unit's input "DATA" number.

Enumerator
CY_SMARTIO_DATA0	Input DATA #0.
CY_SMARTIO_DATA1	Input DATA #1.

cy_en_smartio_luttr_t

enum cy_en_smartio_luttr_t

Smart I/O LUT input trigger source.

Enumerator
CY_SMARTIO_LUTTR_DU_OUT	Data Unit output.
CY_SMARTIO_LUTTR_LUT0_OUT	LUT0 output.
CY_SMARTIO_LUTTR_LUT1_OUT	LUT1 output.
CY_SMARTIO_LUTTR_LUT2_OUT	LUT2 output.
CY_SMARTIO_LUTTR_LUT3_OUT	LUT3 output.
CY_SMARTIO_LUTTR_LUT4_OUT	LUT4 output.
CY_SMARTIO_LUTTR_LUT5_OUT	LUT5 output.
CY_SMARTIO_LUTTR_LUT6_OUT	LUT6 output.
CY_SMARTIO_LUTTR_LUT7_OUT	LUT7 output.
CY_SMARTIO_LUTTR_CHIP0	Chip signal 0 (for LUT 0,1,2,3)
CY_SMARTIO_LUTTR_CHIP4	Chip signal 4 (for LUT 4,5,6,7)
CY_SMARTIO_LUTTR_CHIP1	Chip signal 1 (for LUT 0,1,2,3)
CY_SMARTIO_LUTTR_CHIP5	Chip signal 5 (for LUT 4,5,6,7)
CY_SMARTIO_LUTTR_CHIP2	Chip signal 2 (for LUT 0,1,2,3)
CY_SMARTIO_LUTTR_CHIP6	Chip signal 6 (for LUT 4,5,6,7)
CY_SMARTIO_LUTTR_CHIP3	Chip signal 3 (for LUT 0,1,2,3)
CY_SMARTIO_LUTTR_CHIP7	Chip signal 7 (for LUT 4,5,6,7)
CY_SMARTIO_LUTTR_IO0	I/O signal 0 (for LUT 0,1,2,3)
CY_SMARTIO_LUTTR_IO4	I/O signal 4 (for LUT 4,5,6,7)
CY_SMARTIO_LUTTR_IO1	I/O signal 1 (for LUT 0,1,2,3)
CY_SMARTIO_LUTTR_IO5	I/O signal 5 (for LUT 4,5,6,7)
CY_SMARTIO_LUTTR_IO2	I/O signal 2 (for LUT 0,1,2,3)
CY_SMARTIO_LUTTR_IO6	I/O signal 6 (for LUT 4,5,6,7)
CY_SMARTIO_LUTTR_IO3	I/O signal 3 (for LUT 0,1,2,3)
CY_SMARTIO_LUTTR_IO7	I/O signal 7 (for LUT 4,5,6,7)
CY_SMARTIO_LUTTR_INVALID	Invalid input trigger selection.

cy_en_smartio_lutopc_t

enum cy_en_smartio_lutopc_t

Smart I/O LUT opcode.

Enumerator
CY_SMARTIO_LUTOPC_COMB	Combinatorial output.
CY_SMARTIO_LUTOPC_GATED_TR2	TR2 gated, Combinatorial output.
CY_SMARTIO_LUTOPC_GATED_OUT	Sequential (gated) output.
CY_SMARTIO_LUTOPC_ASYNC_SR	Asynchronous Set/Reset mode.

cy_en_smartio_dutr_t

enum cy_en_smartio_dutr_t

Smart I/O Data Unit input trigger source.

Enumerator
CY_SMARTIO_DUTR_ZERO	Constant 0.
CY_SMARTIO_DUTR_ONE	Constant 1.
CY_SMARTIO_DUTR_DU_OUT	Data Unit output.
CY_SMARTIO_DUTR_LUT0_OUT	LUT0 output.
CY_SMARTIO_DUTR_LUT1_OUT	LUT1 output.
CY_SMARTIO_DUTR_LUT2_OUT	LUT2 output.
CY_SMARTIO_DUTR_LUT3_OUT	LUT3 output.
CY_SMARTIO_DUTR_LUT4_OUT	LUT4 output.
CY_SMARTIO_DUTR_LUT5_OUT	LUT5 output.
CY_SMARTIO_DUTR_LUT6_OUT	LUT6 output.
CY_SMARTIO_DUTR_LUT7_OUT	LUT7 output.
CY_SMARTIO_DUTR_INVALID	Invalid input trigger selected.

cy_en_smartio_dudata_t

enum cy_en_smartio_dudata_t

Smart I/O Data Unit input "DATA" source.

Enumerator
CY_SMARTIO_DUDATA_ZERO	Constant 0.
CY_SMARTIO_DUDATA_CHIP	Chip signal [7:0].
CY_SMARTIO_DUDATA_IO	I/O signal [7:0].
CY_SMARTIO_DUDATA_DATAREG	SMARTIO.DATA register.

cy_en_smartio_duopc_t

enum cy_en_smartio_duopc_t

Smart I/O Data Unit opcode.

Enumerator
CY_SMARTIO_DUOPC_INCR	Increment (Count up)
CY_SMARTIO_DUOPC_DECR	Decrement (Count down)
CY_SMARTIO_DUOPC_INCR_WRAP	Increment and wrap-around (Count up and wrap)
CY_SMARTIO_DUOPC_DECR_WRAP	Decrement and wrap-around (Count down and wrap)
CY_SMARTIO_DUOPC_INCR_DECR	Increment or decrement (Count up/down)
CY_SMARTIO_DUOPC_INCR_DECR_WRAP	Increment or decrement with wrap-around (Count up/down and wrap)
CY_SMARTIO_DUOPC_ROR	Rotate right (shift right and wrap)
CY_SMARTIO_DUOPC_SHR	Shift right and shift data in through MSB.
CY_SMARTIO_DUOPC_AND_OR	out = ((DATA0 & DATA1) == 0) ? 0 : 1
CY_SMARTIO_DUOPC_SHR_MAJ3	Majority 3 (Check if 2 out of 3 LSB bits are logic 1)
CY_SMARTIO_DUOPC_SHR_EQL	Check for equality against DATA1. Also perform Shift right

cy_en_smartio_dusize_t

enum cy_en_smartio_dusize_t

Smart I/O Data Unit operation bit size.

Enumerator
CY_SMARTIO_DUSIZE_1	1-bit size/width operand
CY_SMARTIO_DUSIZE_2	2-bits size/width operand
CY_SMARTIO_DUSIZE_3	3-bits size/width operand
CY_SMARTIO_DUSIZE_4	4-bits size/width operand
CY_SMARTIO_DUSIZE_5	5-bits size/width operand
CY_SMARTIO_DUSIZE_6	6-bits size/width operand
CY_SMARTIO_DUSIZE_7	7-bits size/width operand
CY_SMARTIO_DUSIZE_8	8-bits size/width operand