Specifies the behavior of the Shift Register outputs while Shift Register is disabled.
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#define | CY_TCPWM_SHIFTREG_OUTPUT_HIGHZ (0U) |
| | Shift Register output (default) high impedance.
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#define | CY_TCPWM_SHIFTREG_OUTPUT_RETAIN (1U) |
| | Shift Register outputs are retained.
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#define | CY_TCPWM_SHIFTREG_OUTPUT_LOW (2U) |
| | Shift Register output LOW.
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#define | CY_TCPWM_SHIFTREG_OUTPUT_HIGH (3U) |
| | Shift Register output HIGH.
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