PSOC E8XXGP Device Support Library
I3C Target Status

General Description

Macros to check current I3C target status returned by Cy_I3C_GetBusStatus function.

Each I3C target status is encoded in a separate bit, therefore multiple bits may be set to indicate the current status.

Note
I3C supports only Primary Controller mode in PSE84A0. Secondary controller mode and Target mode are supported in PSE84B0.

Macros

#define CY_I3C_TARGET_RD_CMPLT   (0x00002000UL)
 The controller has finished reading data from the target.
 
#define CY_I3C_TARGET_WR_CMPLT   (0x00004000UL)
 The controller has finished writing data into the target.
 
#define CY_I3C_TARGET_RD_BUSY   (0x00008000UL)
 There is a read transaction in progress.
 
#define CY_I3C_TARGET_WR_BUSY   (0x00010000UL)
 There is a write transaction in progress.